CD4013BE CD4013 CMOS Dual D-Type Flip Flop DIP14

Description

CD4013BE CD4013 CMOS Dual D-Type Flip Flop DIP14
Description
CD4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q\ outputs. These devices can be used for shift register applications, and , by connecting Q\ output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or rest line, respectively.
Features
Set-Reset capability
Static flip-flop operation  retains state indefinitely with clock level either "high" or "low"
Medium-speed operation 16MHz (typ.) clock toggle rate at 10 V
Standardized, symmetrical output characteristics
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25C
100% tested for quiescent current at 20 V
Noise margin (full package-temperature range) =
1 V at V
DD
= 5 V
2 V at V
DD
= 10 V
2.5 V at V
DD
= 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
Registers, counters, control circuits
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